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june 2016 docid028792 rev 2 1 / 14 this is information on a product in full production. www.st.com STL190N4F7AG automotive - grade n - channel 40 v, 1.68 m typ., 120 a stripfet? f7 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max i d STL190N4F7AG 40 v 2.00 m 120 a ? designed for automotive applications and aec - q101 qualified ? among the lowest r ds(on) on the market ? excellent fom (figure of merit) ? low c rss /c iss ratio for emi immunity ? high avalanche ruggedness ? wettable flank package applications ? switching applications description this n - channel power mosfet utilizes stripfet? f7 technology with an enhanced trench gate structure that results in very low on - state resistance, while also reducing internal capacitance and gate charge for fas ter and more efficient switching. table 1: device summary order code marking package packaging STL190N4F7AG 190n4f7 powerflat? 5x6 tape and reel
contents STL190N4F7AG 2 / 14 docid028792 rev 2 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 5 3 test circuits ................................ ................................ ..................... 7 4 package mechanical data ................................ ............................... 8 4.1 powerflat? 5x6 wf type c package information .......................... 8 4.2 p owerflat? 5x6 packing information ................................ ........... 11 5 revision history ................................ ................................ ............ 13
STL190N4F7AG electrical ratings docid028792 rev 2 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 40 v v gs gate - source voltage 20 v i d (1) drain current (continuous) at t c = 25 c 120 a i d (1) drain current (continuous) at t c = 100 c 120 a i dm (1) (2) drain current (pulsed) 480 a p tot total dissipation at t c = 25 c 127 w i av avalanche current, repetitive or not repetitive (pulse width limited by maximum junction temperature) 35 a e as single pulse avalanche energy (t j = 25 c, i d = 17.5 a, v dd = 22 v) 300 mj t j operating junction temperature range - 55 to 175 c t stg storage temperature range notes: (1) drain current is limited by package, the current capability of the silicon is 183 a at 25 c. (2) pulse width limited by safe operating area table 3: thermal data symbol parameter value unit r thj - pcb (1) thermal resistance junction - pcb 31.3 c/w r thj - case t hermal resistance junction - case 1.18 c/w notes: (1) when mounted on fr - 4 board of 1 inch2, 2oz cu, t < 10 s.
electrical characteristics STL190N4F7AG 4 / 14 docid028792 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4: on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 250 a 40 v i dss zero gate voltagedrain current v gs = 0 v v ds = 40 v 1 a i gss gate - body leakage current v gs = 20 v, v ds = 0 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2 4 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 17.5 a 1.68 2.00 m table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 25 v, f = 1 mhz, v gs = 0 v - 3000 - pf c oss output capacitance - 850 - pf c rss reverse transfer capacitance - 70 - pf q g total gate charge v dd = 20 v, i d = 35 a, v gs = 10 v (see figure 14: "test circuit for gate charge behavior" ) - 41 - nc q gs gate - source charge - 15 - nc q gd gate - drain charge - 7 - nc table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 20 v, i d = 17.5 a, r g = 4.7 , v gs = 10 v (see figure 13: "test circuit for resistive load switching times" and figure 18: "switching time waveform" ) - 19 - ns t r rise time - 6.4 - ns t d(off) turn - off delay time - 25 - ns t f fall time - 6.5 - ns table 7: source - drain diode symbol parameter test conditions min. typ. max. unit v sd (1) forward on voltage i sd = 35 a, v gs = 0 v - 1.2 v t rr reverse recovery time i d = 35 a, di/dt = 100 a/s v dd = 32 v (see figure 15: "test circuit for inductive load switching and diode recovery times" ) - 43 ns q rr reverse recovery charge - 43 nc i rrm reverse recovery current - 2 a notes: (1) pulsed: pulse duration = 300 s, duty cycle 1.5%
STL190N4F7AG electrical characteristics docid028792 rev 2 5 / 14 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
electrical characteristics STL190N4F7AG 6 / 14 docid028792 rev 2 figure 8 : capacitance variations figure 9 : normalized on - resistance vs temperature figure 10 : normalized v(br)dss vs temperature figure 11 : normalized gate threshold voltage vs temperature figure 12 : source - drain diode forward characteristics
STL190N4F7AG test circuits docid028792 rev 2 7 / 14 3 test circuits figure 13 : test circuit for resistive load switching times figure 14 : test circuit for gate charge behavior figure 15 : test circuit for inductive load switching and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
package mechanical data STL190N4F7AG 8 / 14 docid028792 rev 2 4 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? speci fications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat? 5x6 wf type c package information figure 19 : powerflat? 5x6 wf type c package outline 8231817_wf_typec_r14
STL190N4F7AG packag e mechanical data docid028792 rev 2 9 / 14 table 8: powerflat? 5x6 wf type c mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 c 5.80 6.00 6.10 d 5.00 5.20 5.40 d2 4.15 4.45 d3 4.05 4.20 4.35 d4 4.80 5.00 5.10 d5 0.25 0.40 0.55 d6 0.15 0.30 0.45 e 1.27 e 6.20 6.40 6.60 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 e6 0.20 0.325 0.45 e7 0.85 1.00 1.15 e9 4.00 4.20 4.40 e10 3.55 3.70 3.85 k 1.05 1.35 l 0.90 1.00 1.10 l1 0.175 0.275 0.375 0 12
package mechanical data STL190N4F7AG 10 / 14 docid028792 rev 2 figure 20 : powerflat? 5x6 recommended footprint (dimensions are in mm) 8231817_footprint_rev14
STL190N4F7AG package mechanical data docid028792 rev 2 11 / 14 4.2 powerflat? 5x6 packing information figure 21 : powerflat? 5x6 wf tape (dimensions are in mm) figure 22 : powerflat? 5x6 package orientation in carrier tap e
package mechanical data STL190N4F7AG 12 / 14 docid028792 rev 2 figure 23 : powerflat? 5x6 reel (dimensions are in mm)
STL190N4F7AG revision history docid028792 rev 2 13 / 1 4 5 revision history table 9: document revision history date revision changes 07 - jan - 2016 1 first release. 23 - jun - 2016 2 updated package silhouette and figure 1: "internal schematic diagram" in cover page. updated section 6.1: "powerflat? 5x6 wf type c package inform ation" . minor text changes.
STL190N4F7AG 14 / 14 docid028792 rev 2 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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